Parametric study on flip chip package with lead-free solder joints by using the probabilistic designing approach

Abstract

The low cost tin–lead solders have been widely used in electronic industries for many years, but it is also well known to be one of the major factors for environmental pollution risk. Today, several kinds of lead-free soldered alloy have been developed as a choice for replacement of the high lead solders. However, because of the shortage of the facilitated experiment data for the thermal mechanical kinetics characterisations of these alloy, only very few parts of the parametric influence on reliability of the lead-free soldered flip chip package have been realized. In order to launch a further investigation on this issue, a numerical simulation-based parametric study on a flip chip is implemented in this paper by using the probabilistic designing approach. It combines the response surface strategy and the Monte Carlo random simulation method. The peak values of the inelastic strain and hydrostatic stress in solder joints, as well as the peel stress and the shear stress in the interface between silicon and underfill are investigated and used as response parameters. The response surface approximate functions between the output stress/strain values and the major packaging parameters are produced in the design of experiment (DOE) procedure of the numerical simulations. Statistical results of the parametric influence on lead-free soldered flip chip are also acquired by the Monte Carlo random simulation process. The results of our studies have shown that the different packaging parameters will influence the output stress/strain state of the lead-free soldered flip chip package in a very different way and degree. It is indicated that the substrate thickness is a major factor that should be taken into account for the lead-free package optimization design.