Parallelization of cipher algorithm on CPU/GPU for real-time software-defined access network

Abstract

Network Function Virtualization (NFV) and Software Defined Network (SDN) are attracting attention with the goal being enhanced networks efficiency. To enhance flexibility and to meet user requests and conditions, software implementation of communications equipment is pursued as our approach. It becomes possible to implement various optical line terminal (OLT) functions on the common hardware by realizing the functions as software. The proposed approach prevents kinds of systems from increasing and simplifies maintenance. Throughput on lower-performance software comparing with dedicated circuits is a problem. This paper focuses on a cipher algorithm for the access network as typical of the more demanding OLT functions and proposes parallel implementation on CPU/GPU resources that offers real-time processing. This paper targets the CTR and GCM which are utilized on PON systems. For software implementation, this paper proposes a data-parallelization-based algorithm architecture. Evaluation results gathered from a many-core CPU simulator and GPU show that throughput is sufficient for the 5.37-Gbps CTR-AES128 process and the 914 Mbps GCM-AES128 process. The proposed parallel algorithm on a GPU is 141 times faster than serial processing. It is also found that the cipher circuit of 1-Gbps-class PON systems utilizing CTR-AES128 can be replaced with GPU.