Parallel sample path generation for discrete event systems and the traffic smoothing problem

Abstract

We review two approaches, the Standard Clock (SC) technique and Augmented System Analysis (ASA), that have been proposed for generating sample paths of Discrete Event Systems (DES) in parallel. These are placed in the unifying framework of the fundamentalsample path constructability problem: for a finite discrete parameter set Θ = {θ1, ..., θm}given a sample path under θ1 the problem is to simultaneously construct sample paths under all remaining parameter values. Using the ASA approach we then consider the problem of smoothing arbitrary, generally bursty, and possibly nonstationary traffic processes which are encountered in many applications, especially in the area of flow control for integrated-service, high-speed networks. We derive some basic structural properties of a smoothing scheme known as the Leaky Bucket (LB) mechanism through which it is seen that the variability of a traffic process can be monotonically decreased by decreasing an integer-valued parameter of this scheme. Finally, we show that a sample path under any value of this parameter is constructable with respect to an observed sample path under any other value. Therefore, by controlling this parameter on line, we show how simple iterative optimization schemes can be used to achieve typical design objectives such as keeping both the mean packet delay due to smoothing and the variability of the traffic process low.