Parallel Programming of an Ionic Floating-Gate Memory Array for Scalable Neuromorphic Computing

Abstract

Neuromorphic computers could overcome efficiency bottlenecks inherent to conventional computing through parallel programming and read out of artificial neural network weights in a crossbar memory array. However, selective and linear weight updates and <10nA read currents are required for learning that surpasses conventional computing efficiency. We introduce an ionic floating-gate memory array [1] based upon a polymer redox transistor connected to a volatile conductive-bridge memory (CBM). Selective and linear programming of a transistor array is executed in parallel by overcoming the bridging threshold of the CBMs. Synaptic weight readout with currents <10nA is achieved by diluting the conductive polymer in an insulating channel to decrease the conductance. The redox transistors endure > 109 ‘read-write’ operations and support > 1MHz ‘read-write’ frequencies. [1] Fuller et. al. Science, 2019 (in press)