Abstract
While the frame rate is higher and the image size is larger, sequence images processing is harder. Good real-time can be ensured by the multi-core DSP in the embedded image processing system. TMS320C6670 which is the multi-core DSP designed by TI corporation is selected as study object. Based on hardware characteristics analyzed, the Data Flow model is adopted as the multi-core processing model. Two data processing subtasks assigning methods are analyzed by comparing their advantages and disadvantages on the system idle time and memory requirements. The data processing subtask assigning flow is design for a serial sequence images processing example. An inter-core data transfer flow design idea is put forward. Using methods and occasion of two kinds of data buffer establishing techniques is studied and defined. An inter-core notification flow design idea is put forward. Using methods and occasion of three notification methods based on the interrupt controller and the Semaphore2 module is studied and defined.
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