Abstract
An Elliptic Curve Crypto-Processor (ECCP) is a favourite public-key cryptosystem. It is used for embedded systems due to its small key size and its high security arithmetic unit. It is applied in constrained devices which often run on batteries and have limited processing, storage capabilities and low power. A finite field polynomial multiplier takes the most implementation effort of an ECCP because it is the most consuming operation for time and area. So, it is preferable to optimize this operation especially for light devices where the small area is needed. This research introduces a hardware design for parallel ECCP binary implementation that is based on Montgomery ladder algorithm. This implementation is targeted for GF(2163) and GF(2409) where the executed time are 2.9 μs and 29 μs respectively. The implementation is performed on Xilinx ISE Virtex6.
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