Parallel Hough Transform-Based Straight Line Detection and Its FPGA Implementation in Embedded Vision

Xiaofeng Lu,Songyu Yu,Nam Ling,Sumin Shen,Kang He,Li Song

doi:10.3390/s130709223

Abstract

Hough Transform has been widely used for straight line detection in low-definition and still images, but it suffers from execution time and resource requirements. Field Programmable Gate Arrays (FPGA) provide a competitive alternative for hardware acceleration to reap tremendous computing performance. In this paper, we propose a novel parallel Hough Transform (PHT) and FPGA architecture-associated framework for real-time straight line detection in high-definition videos. A resource-optimized Canny edge detection method with enhanced non-maximum suppression conditions is presented to suppress most possible false edges and obtain more accurate candidate edge pixels for subsequent accelerated computation. Then, a novel PHT algorithm exploiting spatial angle-level parallelism is proposed to upgrade computational accuracy by improving the minimum computational step. Moreover, the FPGA based multi-level pipelined PHT architecture optimized by spatial parallelism ensures real-time computation for 1,024 × 768 resolution videos without any off-chip memory consumption. This framework is evaluated on ALTERA DE2-115 FPGA evaluation platform at a maximum frequency of 200 MHz, and it can calculate straight line parameters in 15.59 ms on the average for one frame. Qualitative and quantitative evaluation results have validated the system performance regarding data throughput, memory bandwidth, resource, speed and robustness.

Highlights

Optimal straight line detection is a considerable step for several embedded vision applications, and the largest research focus is based on the Hough Transform (HT) [1]
We primarily present a novel parallel Hough Transform (PHT)-based straight line detection algorithm and the corresponding architecture implementation on Field Programmable Gate Arrays (FPGA) to deal with the acceleration and accuracy problems of classical
The first column is the original image, the second column is the result of least squares method (LSM), and the third column is the result of our proposed PHT

Summary

Introduction

Optimal straight line detection is a considerable step for several embedded vision applications, and the largest research focus is based on the Hough Transform (HT) [1]. There are many FPGA implementation research areas, such as lane detection [6], stereo vision processing [7,8], high-speed face detection [9], image segmentation [10], background subtraction [11], and more. These interesting real-time applications demonstrate the great computational performance of the FPGA architecture. A novel real-time FPGA architecture based on a modified Canny edge detection method and spatial angle-level optimized parallel Hough Transform (PHT) algorithm to accomplish straight line detection in high-definition video sequence is proposed

Methods

Results

Conclusion