Parallel administration of events in real-time systems

Abstract

An extended computer architecture suitable of improving the performance of embedded systems encountered in hard real-time environments is described that enhances reliability and efficiency by exploiting possibilities for parallel processing inherent to real-time systems. It is shown that internal data transmission due to context-switching operations can be eliminated and the CPU relieved from a considerable amount of routine work by providing a separate module for major functions of real-time operating systems, viz. for interrupt and signal recognition, for the time management, the administration of task schedules, the transfer of tasks between different states, and the initial system start-up. Considering the layer model of contemporary real-time operating systems, these functions constitute the kernel and the first layer of an operating system. A mathematical theory of task schedules and of the conditions, under which they are fulfilled, is developed. Then, the functions of the event processor are described by detailing a number of algorithms running as reactions to occurred events. Their complexities are mainly proportional to the number schedules under observation. This hardware implementation of typical hard real-time support features provide a clear physical separation of the intrinsically independent functions event recognition and processing from general task processing. While reducing overhead and minimising response and reaction times in general, the architecture makes it possible to guarantee a predefined, short upper bound for the reaction time to external and internal events.