Palletized approach to large-area thin-film processing-materials, modeling, and measurement

Abstract

The fabrication of high-density interconnect structures typically involves sequential processing of alternate layers of thin-film organic dielectric materials and conducting copper lines. With the continued push toward low-cost fabrication, large-area processing of thin-film materials is being aggressively pursued by the electronic packaging industry. The objective of the ongoing work at Georgia Tech is to develop innovative materials, models, and processing techniques to facilitate large-area processing of alumina and silicon tiles. As the alumina and silicon tiles are commercially available in smaller dimensions, a palletization approach has been developed to facilitate large-area processing. In the palletization approach, alumina and silicon tiles are attached to re-usable glass pallets with an in-house developed thermally stable, re-workable, and highly-compliant adhesive. Numerical models incorporating the viscoelastic behavior of the adhesive material were developed to understand the warpage induced during the palletization process during the thin-film processing on the tiles. In-situ shadow-moire experiments during curing were conducted to validate the results predicted through the models.