Abstract

NAND flash memory is increasingly widely used as a storage medium due to its compact size, high reliability, low-power consumption, and high I/O speed. It is important to select a powerful and intelligent page replacement algorithm for NAND flash-based storage systems. However, the features of NAND flash, such as the asymmetric I/O costs and limited erasure lifetime, are not fully taken into account by traditional strategies. In order to address these existing shortcomings, this paper suggests a new page replacement algorithm, called probability-based adjustable algorithm onlow inter-reference recency set (PA-LIRS). PA-LIRS completely exploits the “recency” and “frequency” information simultaneously to make a replacement decision. PA-LIRS gives a greater probability to clean pages and a smaller probability to dirty pages when evict selection happens. In addition, this proposed algorithm dynamically adjusts the parameter based on the workload pattern to further improve the I/O performance of NAND flash memory. Through a series of comparative experiments on various types of synthetic traces, the results show that PA-LIRS outperforms the previous studies in most cases.

Highlights

  • IntroductionMagnetic disks have been overwhelmingly used as storage media in many fields

  • For several decades, magnetic disks have been overwhelmingly used as storage media in many fields

  • The architecture of NAND flash memory allows read and program commands to be executed on a page basis, and erase operations are performed at the level of a block that consists of multiple pages

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Summary

Introduction

Magnetic disks have been overwhelmingly used as storage media in many fields. NAND flash memory shows a series of prominent advantages, such as its compact size, high reliability, low power consumption, and high. NAND flash memory is a type of electronic nonvolatile storage medium organized in blocks, each of which is generally 256 KB to 20 MB in size and consists of a given number of pages. NAND flash memory has a shorter random access latency due to its non-mechanical seek movement, which helps to bridge the access speed disparity between the operating system and storage device. The architecture of NAND flash memory allows read and program commands to be executed on a page basis, and erase operations are performed at the level of a block that consists of multiple pages. Inter-reference Recency Set) algorithm [23], and this section introduces the LIRS algorithm briefly.

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