Abstract

We demonstrate an optical clock recovery circuit that extracts the line rate component on a per packet basis from short data packets at 40Gb/s. The circuit comprises a Fabry-Perot filter followed by a novel power limiting configuration, which in turn consists of a 5m highly nonlinear bismuth oxide fiber in cascade with an optical bandpass filter. Both experimental and simulation-based results are in close agreement and reveal that the proposed circuit acquires the timing information within only a small number of bits, yielding a packet clock for every respective data packet. Moreover, we investigate theoretically the scaling laws for the parameters of the circuit for operation beyond 40 Gb/s and present simulation results showing successful packet clock extraction for 160 Gb/s data packets. Finally, the circuit's potential for operation at 320 Gb/s is discussed, indicating that ultrafast packet clock recovery should be in principle feasible by exploiting the passive structure of the device and the fsec-scale nonlinear response of the optical fiber.

Highlights

  • IntroductionOptical packet switching has been introduced as the main concept for improving the. #77088 - $15.00 USD Received 15 Nov 2006; revised 21 Mar 2007; accepted 21 Mar 2007; published 24 Jul 2007

  • Optical packet switching has been introduced as the main concept for improving the#77088 - $15.00 USD Received 15 Nov 2006; revised 21 Mar 2007; accepted 21 Mar 2007; published 24 Jul 2007(C) 2007 OSA utilization of the network resources offering increased bandwidth efficiency and reducing latency in future optical networks

  • We provide for the first time to our knowledge the experimental proof-ofprinciple of this concept, demonstrating successful packet clock recovery at 40 Gb/s using an Fabry-Pérot filter (FPF) and a fiber-based power limiter

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Summary

Introduction

Optical packet switching has been introduced as the main concept for improving the. #77088 - $15.00 USD Received 15 Nov 2006; revised 21 Mar 2007; accepted 21 Mar 2007; published 24 Jul 2007. Several all-optical clock recovery techniques have been demonstrated, including mode-locked ring lasers [1], optical phase-locked loops [2], Fabry-Pérot lasers [3], selfpulsating lasers [4] and circuits based on a Fabry-Pérot filter (FPF) [5,6] Among these configurations, only the self-pulsating lasers and the FPF-based schemes have performed successfully with packet-formatted optical traffic. In order to avoid this dependence and the associated operational bit-rate limitations, a new concept has been recently introduced that utilizes fiber-based power limiting designs after an FPF, allowing for data processing at the fibers’ nonlinearity time parameters [7]. The circuit potential for operation at 320 Gb/s is discussed and parameters for clock recovery at this rate are extracted, revealing that ultrafast timing extraction could be in principle feasible by exploiting the passive structure of the device and the practically instantaneous response of the Kerr nonlinearity

Operating principle of the clock recovery circuit
Simulation results and extension of the concept at higher data rates
Conclusions
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