Abstract
This paper proposes a novel single-dc-source multilevel inverter called Packed E-Cell (PEC) topology to achieve nine levels with noticeably reduced components count, while dc capacitors are actively balanced. The nine-level PEC (PEC9) is composed of seven active switches and two dc capacitors that are shunted by a four-quadrant switch to from the E-cell, and it makes use of a single dc link. With the proper design of the corresponding PEC9 switching states, the dc capacitors are balanced using the redundant charging/discharging states. Since the shunted capacitors are horizontally extended, both capacitors are simultaneously charged or discharged with the redundant states, so only the auxiliary dc-link voltage needs to be sensed and regulated to half of the input dc source voltage, and consequently, dc capacitors' voltages are inherently balanced to one quarter of the dc bus voltage. To this end, an active capacitor voltage balancing integrated to the level-shifted half-parabola carrier PWM technique has been designed based on the redundant charging/discharging states to regulate the dc capacitors voltages of PEC9. Furthermore, using the E-cell not only reduces components count but also the proposed topology permits multi ac terminal operation. Thus, five-level inverter operation can be achieved during the four-quadrant switch fault, which confers to the structure high reliability. The theoretical analysis as well as the experimental results are presented and discussed, showing the basic operation, multi-functionality, as well as the superior performance of the proposed novel PEC9 inverter topology.
Highlights
Multilevel Voltage Source Inverters (MVSIs) have been emerged as a competitive power converter in various industrial applications including uninterruptible power supply, renewable energy integration, electrical drives, active power filters, etc [1], [2]
Following development of MVSIs led by tremendous researches that were oriented toward new topologies mainly
As the primarily attempt and being inspired by conceptual of Cascaded H-Bridge (CHB), the hybrid structures of conventional MVSIs such as symmetrical and asymmetrical cascaded topology were utilized for HB, Neutral Point Clamped inverter (NPC) and Flying Capacitors inverter (FC) to increase the number of voltage levels and operate with higher efficiency [7]–[11]
Summary
Multilevel Voltage Source Inverters (MVSIs) have been emerged as a competitive power converter in various industrial applications including uninterruptible power supply, renewable energy integration, electrical drives, active power filters, etc [1], [2]. Since the time duration for integral functions of Eq (5) and Eq (6) is changed by changing the pulses width as a result of changing the modulation index of switching technique, the redundant switching state must be deal into a PWM technique to adjust the charging and discharging time and regulate the capacitors voltages to the desired amplitude level As it shown in Eq (5) and Eq (6), controlling both capacitors voltages to the levels ±E/2 leads to equal ripple values in both of half cycle that guarantee voltage balancing. PROPOSED ACTIVE CAPACITOR VOLTAGE BALANCING PWM TECHNIQUE USING SINGLE VOLTAGE SENSOR FOR AUXILIARY DC-LINK According to the proposed method, if V>0 the discharging states (3, 10, 16 & 21 for Iout >0) and if V
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