Package Stress Monitor to Compensate for the Piezo-Hall Effect in CMOS Hall Sensors

Abstract

Package-induced stress changes the sensitivity of planar Hall plates via the piezo-Hall effect. In this paper, we present a novel stress sensor that allows us to compensate for this undesired mechanical cross-sensitivity. The new CMOS-compatible sensor is based on a Wheatstone bridge built of eight appropriately arranged n- and p-doped piezoresistors. The differential output signal $V_{\rm bridge}$ of the sensor is proportional to the sum of in-plane normal stresses $\sigma_{xx}+\sigma_{yy}$ with the sensitivity $S_{{\rm bridge},\sigma}=\partial\left(V_{\rm bridge}/V_{\rm bias}\right)/\partial\left(\sigma_{xx}+\sigma_{yy}\right)=-0.047~{\rm GPa}^{-1}$ . Doping concentrations larger than $10^{19}~{\rm cm}^{-3}$ for both the n- and p-type resistors are used to minimize the parasitic resistor mismatch due to the junction field effect. Simultaneously, the highly doped resistors keep the relative thermal cross-sensitivity of the sensor as small as $74~{\rm ppm~K}^{-1}$ . In contrast to conventional sensor rosettes, the new sensor has the advantage of offering a differential output signal. The measured signal is successfully used to decrease the stress-impact on the sensitivity of CMOS Hall sensors by a factor of five.