PA-8000: a case study of static and dynamic branch prediction

Abstract

While many dynamic branch prediction schemes have been proposed and studied, few have been compared to static branch prediction. Fewer yet have been implemented side-by-side on the same machine to allow full performance evaluation. The Hewlett-Packard PA-8000 microprocessor implements both a simple dynamic prediction scheme and static prediction, selectable by the application programmer. This paper studies the PA-8000's trade-off between static and dynamic prediction, and the compiler optimizations needed to support an innovative static branch prediction convention while maintaining object code compatibility with earlier revisions of the PA-RISC architecture.