Abstract
The feasibility of three-dimensional (3D) ultrasound imaging methods involving computations depends on the performance of a computer. To realize efficient high-speed image reconstruction, we examined hardware (HW) implementation that is required. The HW was designed by using VHDL for implementation on a field-programmable gate array (FPGA). This paper first presents an image reconstruction algorithm and subsequently discusses the dedicated HW architecture for performing the image reconstruction.
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