P1G-2 Dynamically Reconfigurable Neural Network Hardware Design for Ultrasonic Target Detection

Abstract

Ultrasonic flaw detection and classification is an essential method for many NDE applications. Frequency diverse algorithms such as split spectrum processing (SSP) can be used effectively for flaw detection since they decompose the signal in different subbands and induce significant statistical variation in scattering noise or speckles. Following the subband decomposition, neural networks can be used as post-processors for enhanced detection performance. In this study, it has been shown that using neural networks (NN), the flaw-to-clutter ratio (FCR) improvement up to 13dB can be achieved when the input experimental signal has FCR equal to 0dB or less. The experimental ultrasonic flaw signals masked by grain scattering noise (i.e., clutter) are obtained from a steel block using a 5MHz transducer and 100MHz sampling rate. Neural network algorithms are computationally demanding and require substantial hardware resources for implementation due to their complex connectivity. Therefore, we have designed an efficient and adaptable neural network architecture for real-time realization of ultrasonic flaw detection applications. The hardware implementation takes full advantage of the inherent parallelism of neural networks and is dynamically reconfigurable; indicating the system is flexible and can be suitable for various NDE applications