橫向閘控具鋁/二氧化矽/p型矽結構之金屬-絕緣層-半導體穿隧二極體研究與其應用

Abstract

In this dissertation, the electrical properties of the laterally gated metal-insulator-semiconductor (MIS) tunnel diode with Al/SiO2/Si(p) structure had been thoroughly investigated. It was found that the electrical properties of the laterally gated MIS(p) tunnel diode device can be dramatically changed by engineering the oxide thickness only within 1 nm variation. The negative transconductances were found in the transfer characteristics of the devices. The peak-to-valley-current ratio (PVCR) can have five orders enhancement as the oxide thickness of the device increases from 2.2 nm to 3.3 nm. The maximum PVCR obtained in this dissertation is 1.3×10^6. The device has transistor properties as the oxide thickness is around 3–4 nm. Due to the extraordinary transconductance mechanism different from the conventional metal-oxide-semiconductor field-effect transistor (MOSFET), the laterally gated MIS(p) tunnel diode device could have superior subthreshold swing (S.S.). The S.S. can be lower than the theoretical limit, 60 mV/decade, of the conventional MOSFET. The minimum S.S. obtained in this dissertation is 15.3 mV/decade for more than 3 decades. Furthermore, the device can be used for memory cell applications. The MIS tunnel diode in the device can be utilized as a sensor to detect the memory state charges stored in the dielectrics stack of the lateral gate. During the reading process, the gate voltage is open, which reduces the charge loss and lowers the power consumption comparing with the conventional flash memory cell. With the properties of simple fabrication process and high performance, the laterally gated MIS(p) tunnel diode device has promising potential for the next generation transistor and memory cell applications.