Abstract
Abstract: We adopt a novel digital‐to‐analog conversion (DAC) architecture entitled “quarternary‐type DAC (Q‐DAC)” to column drivers for active‐matrix displays. To realize the Q‐DAC architecture, we newly design level‐shifters and decoders. Compared with conventional binary‐type DAC, our Q‐DAC is more area‐efficient and has smaller RC‐delay characteristics. Proposed circuit has been verified by sucessful fabrication of a 6‐bit column driver for active‐matrix liquid‐crystal displays (AMLCDs). The area of DAC block has been reduced up to 30%. The number of gross‐die per wafer has increased about 10% and the output delay has been reduced 200 ns to 100 ns
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