Abstract
A key challenge of a hybrid system combining Large-Area Electronics (LAE) and Large-Scale Electronics (LSE) is that a large number of interconnects and fan-outs are needed to interface between LAE array and CMOS ICs, making fabrication and integration complex and problematic. This paper presents a solution to reduce the interfacing complexity by replacing CMOS-based interface ICs with dual-gate TFT-based addressing and readout circuits to achieve monolithic integration.
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