Abstract
This paper presents the experimental characterization of SiC MOSFETs exposed to the heavy-ion irradiation. Different leakage paths related to the drain bias used during the tests are observed, suggesting different damage sites in the devices, which can be further verified through the post-irradiation measurements. TCAD simulations are utilized to explore the failure mechanisms. It is shown that the gate oxide damage firstly occurs in the middle of the JFET region, while gradually spreads to the channel region with the increase of biased drain voltage, and terminates at the source region eventually. The findings in this paper demonstrate that more attentions should be paid on the heavy-ion induced gate oxide damage before SiC MOSFETs could act as a drop-in replacement of Si-based counterparts in avionic applications.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.