Abstract

The oxidation of the Ta diffusion barrier and its effect on the reliability of Cu interconnects were investigated by high temperature storage (HTS) and via-to-line biased temperature stressing (BTS) tests. Cu/FSG, Cu/OSG, and Cu/porous low-k interconnects were investigated in vacuum (~ 1 torr), 0.1 atm air, and air. The exponential increase of resistance over the entire temperature range of the test was commonly found during HTS in via-chain test structures of all interconnects. It was different from typical stress migration behavior as the failure rate did not exhibit a peak at an intermediate temperature but increased exponentially with temperature. No voids were found in the failed samples that had resistance increases up to infinity. Instead, the Ta diffusion barrier was oxidized partially according to transmission electron microscopy/electron energy-loss spectroscopy (TEM/EELS) analysis. The oxidation of the Ta barrier at the via bottom was determined to be the cause of the electrical failure during HTS, which agreed with experimental results. During HTS tests, the Ta diffusion barrier was found to be more oxidized at the via sidewalls than at the M1 or M2 trench sidewalls. This oxidized Ta barrier at the via sidewalls was less protective. In the case of Cu/porous low k interconnects, Cu was found to diffuse out through the oxidized barrier at the via sidewalls, whereas Cu out-diffusion through the M1 or M2 trench sidewall was not noticeable. In via-to-line BTS tests, failure was also found to be caused by Cu out-diffusion/drift through the oxidized Ta diffusion barrier at the via sidewalls. The preferential oxidation of the Ta barrier at the via sidewalls and Cu out-diffusion through it suggests that the Ta barrier was more oxidizable and more permeable at the via sidewalls than at the M1 or M2 trench sidewall. Among the three kinds of interconnects used in this study, Cu/porous low-k was the most susceptible to the Ta diffusion barrier oxidation

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