Overlay Mark Design Using Irregular Grating Patterns

Abstract

Overlay refers to controlling the vertical alignment and misalignment between circuit patterns manufactured in the previous process and circuit patterns manufactured in the current process during the stacking process of circuit patterns in the semiconductor manufacturing process. A critical factor in ensuring precise overlay measurements is using an optimized overlay mark design. Many semiconductor manufacturers have put considerable effort into optimizing overlay measurement marks to reduce high costs. However, image-based overlay measurement encounters several challenges, including resolution degradation, image distortion, and noise introduction during digital data conversion. These issues can amplify the uncertainty of overlay measurements, impair optical resolution, and heighten the risk of mismeasurement. In this paper, we introduce irregular grating patterns designed to address the principal challenges faced by the commonly utilized Advanced Imaging Metrology (AIM) marks, namely large overlays and image distortion. Furthermore, we propose an overlay mark capable of precisely identifying overlays exceeding half a pitch and incorporating as much data as possible within the limits of optical resolution. This aims to improve overlay measurement performance. The experimental findings demonstrate that the proposed Pulsated Grating Target (PGT) mark enhances overall measurement uncertainty by approximately 17% compared to the AIM mark. The practical applicability of the PGT was validated through experiments, and we achieved enhanced precision and reliability in overlay measurements by resolving the issue of large overlays—the most significant challenge with grating patterns—and simultaneously enhancing mark performance.