Overcoming Memory Capacity Wall of GPUs With Heterogeneous Memory Stack

Abstract

We propose to overcome the memory capacity limitation of GPUs with a <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Heterogeneous Memory Stack (HMS)</i> that integrates Storage Class Memory (SCM) and DRAM in a 3D memory stack. By effectively utilizing the DRAM as a cache, the HMS addresses the latency, bandwidth, and energy challenges of the SCM. For workloads that mandate memory oversubscription, the HMS can capture a larger fraction of the memory footprint compared to an HBM, providing a significant performance uplift. To enable a performant DRAM cache architecture, we propose a DRAM cache bypass mechanism that avoids DRAM cache thrashing by 100,000 s of GPU threads. Furthermore, we propose a Tag Cache which uses part of L2 cache to hold tags of DRAM cachelines and reduce DRAM cache probe traffic, while enabling adjustment of L2 cache capacity used for Tag Cache. In addition, our DRAM cache organization enables fetching all DRAM cacheline tags in a row with a single column access, avoiding excessive DRAM cache probe traffic from Tag Cache misses. Our results show that the HMS outperforms the baseline HBM system under memory oversubscription by up to 9.8× (2.8× on average).