Abstract
Along with the advancement of IC 3D technology, TSV (through silicon via) has been paid close attention to practically enable the 3D integration and packaging processes with addressing various technical and economical concerns in most recent years. Due to its intrinsic nature of the via size and the amount of via filling materials, the technical requirements in TSV CMP are much more different than those in traditional IC CMP technology. These technical difficulties form new challenges for CMP users to enable TSV CMP process in 3D technology in IC industry. In this work, we are going specifically present some slurry formulation work to demonstrate how to address some of these challenges in two TSV CMP applications.
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