Output Filter Design for Grid-Tied Cascaded Multi-Level Inverters Based on Novel Mathematical Expressions

Davood Solatialkaran,Firuz Zare,Kiarash Gharani Khajeh

doi:10.1109/access.2020.2984792

Davood Solatialkaran, Firuz Zare + Show 1 more

Open Access

https://doi.org/10.1109/access.2020.2984792

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Abstract

Renewable energy resources, which are widely used in modern power systems, require power electronic-based converters to couple with the external grid. The main impact of utilizing power electronic converters on the grid power quality is harmonic generation produced by their switching process. Multi-level inverters are outstanding solutions to significantly reduce the voltage stress and harmonics. In this paper, novel mathematical expressions are derived to calculate the maximum ripple of the inverter output current, which are used to size the inverter-side inductor for an output filter. Moreover, new analytical and simplified formulas are proposed to calculate the damping losses, which lead to optimum selection of the damping resistor of the output filter. Ultimately, a mathematical expression for the grid-side inductor is attained considering compatibility level for harmonics within the range of 2-150 kHz to cover electrical and electronics equipment, which currently are the most important issues in the international standardization committee (IEC, TC77A). The efficiency of the proposed approach is finally validated by the experimental and simulation results.

Highlights

Energy has become the most important concern of human beings since the dawn of industrial revolution
This paper proposes a new mathematical expression for the the maximum ripple power losses across the damping resistor, for horizontally shifted Pulse Width Modulation (PWM), as follows: Prdiapmplpe−max
DESIGN OF THE GRID-SIDE INDUCTOR The grid-side inductor must be designed such that the values of injected current harmonics to the main grid fall into a predefined standard interval

Summary

INTRODUCTION

Energy has become the most important concern of human beings since the dawn of industrial revolution. This paper will present a method to design a filter for a CMI, based on a novel expression for the maximum ripple of the inverter output current, which is calculated mathematically by considering all effective parameters. This paper proposes a new mathematical expression for the the maximum ripple power losses across the damping resistor, for horizontally shifted PWMs, as follows: Prdiapmplpe−max. DESIGN OF THE GRID-SIDE INDUCTOR The grid-side inductor must be designed such that the values of injected current harmonics to the main grid fall into a predefined standard interval These standards, e.g., IEEE 1547, IEEE 519 or IEC 61000-3-2, only consider harmonics up to 2-2.5 kHz. Since the switching frequency of PWM methods is steadily increasing by advancement in semiconductor technologies, the frequency of the current harmonics generated by inverters are being shifted to extremely higher ranges above the existing standards. It is needed to solve (27) at the sampling frequency and at most three sidebands to ensure that it holds for all other harmonics, and select the maximum calculated value for L2

FILTER DESIGN ALGORITHM

DESIGN EXAMPLE

Findings

CONCLUSION