OTA-C Realization of An Optimized FOPID Controller for BLDC Motor Speed Control

Abstract

The paper presents the design and circuit realization of an optimized fractional-order PID controller (FOPID) for speed control of a permanent magnet brushless direct current (BLDC) motor. Here, the FOPID controller is designed using the Nelder-Mead optimization algorithm. The servo-regulatory performance of the BLDC motor using the FOPID controller is compared with integer-order PID controllers, which are designed using tuning methods like Ziegler Nichols, Astrom-Hagglund, Cohen-Coon, and Chien-Hrones-Reswick method. The FOPID controller circuit is realized using Operational Transconductance Amplifiers (OTAs) and capacitors in Cadence Virtuoso Analog Design Environment using GPDK 180 nm technology and simulated using Spectre circuit simulator. The circuit realization is based on the multiple-loop-feedback structure. The OTA-C realization facilitates advantages like electronic tunability, resistor-less, and on-chip realization capability. The time and frequency domain performance measures of the OTA-C FOPID controller with the BLDC motor are evaluated using the Cadence software and compared with the theoretical plots. Finally, a modified OTA-C circuit with reduced active element count is used, and its performance is evaluated.