Origin of performance improvement in solution-processed indium–gallium–zinc-oxide thin-film transistors having thin active layer and asymmetric dual gate structure

Abstract

In this paper, we report the electrical characteristics of thin active layer indium–gallium–zinc-oxide thin-film transistors (IGZO TFTs) having an asymmetric dual gate structure. It was observed that the performance of IGZO TFTs significantly improved when the TFT is operated in the dual gate mode though the performance of the top gate mode shows very poor performance of low field-effect mobility and large subthreshold slope. We found that the channel electrons are coupled in the bulk region when the active layer is very thin, and top gate biasing provides additional electrons to the coupled channel region, which improves the electrical performance of dual gate mode IGZO TFTs. Bias stress instability measurements also indicate that dual gate mode IGZO TFTs show better stability compared to the other mode because coupled electrons are mainly formed in the bulk region, which reduce the effect of interfacial defect density of states. Therefore, the improvements of performance of dual gate electrode IGZO TFTs can be realized regardless of the relatively poor performance of the top gate mode.