Origin and modeling of the frequency dependent output conductance in microwave GaAs MESFET's with buried p layer

Abstract

This paper presents the results of measurements and modeling of the frequency dependent output admittance of GaAs microwave MESFET's with and without the buried p layer constructions. The output conductance of devices without the buried p layer shows a transition from a low to a higher value typically within the frequency range of 10 Hz-100 Hz at 300 K, and 10 KHz-100 KHz at 367 K. The shape of this transition is determined by the presence of multiple deep levels at the channel-substrate interface, while the magnitude of the higher value of the output conductance is determined by the transconductance of the substrate-controlled parasitic FET. The addition of a buried p layer beneath the channel region results in a parasitic n-p-n bipolar transistor without completely eliminating the parasitic FET action. Results of our study show that the combined effects of these two parasitic transistors on the output conductance of the buried p layer device becomes relatively independent of frequency above 10 Hz at 300 K. However, at higher temperatures the frequency dispersion of the output conductance becomes significant at frequencies above 10 Hz. At low frequencies the parasitic FET causes a very high output capacitance, whereas the parasitic BJT action causes a high negative output capacitance. For the purpose of modeling of the output admittance, this paper indicates how the parameters of the parasitic FET and BJT can be determined by direct measurements on the MESFET's. The paper also suggests how the parameters of these parasitic transistors can be tailored by possible device structural changes, in order to achieve MESFET's with negligible dispersion of output conductance.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>