Abstract

The Optimized Reconfigurable Cell Array (ORCA) is a new SRAM based FPGA architecture that makes FPGA's attractive in applications that previously were reserved for gate arrays. The ORCA has an architecture that assures dense layout of all major types of functionality needed including data path, random logic, and SRAM. High density data paths are obtained through a completely nibble oriented structure for both routing and functionality. Good random logic packing results from a novel approach to interconnect that simplifies software and reduces transistor count, coupled with a powerful and flexible functional unit. User access to all SRAM bits associated with Look Up Tables (LUT's) gives good SRAM density. High speed is assured with high speed arithmetic circuits, low resistance interconnect lines, and special low skew clock lines. To insure efficient use of resources, unneeded clock lines can be used to route critical signals instead.

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