Abstract

Folding analog-to-digital converters, fold the input signal symmetrically in order to reduce the number of comparators required to amplitude analyze the signal (preprocessing). The optimum symmetrical number system (OSNS) formulation is a direct consequence of the need to extract the maximum amount of information from a symmetrically folded waveform. OSNS folding converters require the minimum number of comparator circuits for any desired resolution. Although there is a direct correspondence between the OSNS and the residue number system, the symmetrical residues cannot be converted to a binary value (e.g., using the Chinese Reminder Theorem) in a straightforward manner. This paper presents an efficient algorithm that converts the symmetrical residues within a three moduli (2/sup k/+1,2/sup k/,2/sup k/-1) OSNS to the equivalent binary representation. Also presented is a pipelined field programmable gate array (FPGA) realization of the algorithm.

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