Abstract
In principle, the dose should not be changed to make the same linewidth if a perfect anti-reflection coating (ARC) is used for all the sublayers underneath the resist. However, the optimum dose for different sublayers and thicknesses are different even though perfect ARC is used. The post exposure bake (PEB) process of a chemically amplified resist is one of the key processes to make very small features of semiconductor device. The photo-generated acid makes the deprotection of protected polymer, and this deprotection highly depends on the PEB temperature and time. The diffusion length of acid is also strongly dependent on PEB temperature and time. As the linewidth of the device decreases, smaller diffusion length is required to reduce the roughness of the line edge and width. One of the key factors to determine the deprotection and acid diffusion is the initial temperature rising and the final real temperature inside the resist. The unpredictable temperature rising to the pre-set temperature mainly causes the variation of linewidth and the optimum dose. In order to predict the accurate PEB temperature and time dependency of the linewidth and dose, the heat transfer from the hot plate to the resist on the top of the multiply stacked sublayers over the silicon wafer has to be known since the reaction and diffusion occur inside the resist, not on the top of the bare silicon wafer. We studied heat transfer from the hot plate to the top of the resist including conductivity and thickness of each sublayer. For this purpose, a novel numerical approach incorporated with analytic method was proposed to solve the heat conduction problem. The unknowns for temperature are located only at the interfaces between layers, so that it is fast and efficient. We calculated the time that is consumed for the resist to attain the prescribed PEB temperature for the different multi stacks and thicknesses. Calculation shows that the temperature rising is different and final temperature on top of the resist is also different for various sublayers and thicknesses of theirs including resist itself. Experiment by us and others also clearly show that there is a definite temperature difference between on top of the bare wafer and on top of the resist. The effects for the different layer stacks and thicknesses are investigated to obtain proper dose and linewidth control due to different actual resist PEB temperature.
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