Optimum Device Consideration for Standby Power Reduction Scheme Using Drain-Induced Barrier Lowering

Abstract

The optimum device for a standby power reduction scheme utilizing drain-induced barrier lowering (DIBL) has been investigated. In this circuit scheme, the supply voltage is lowered in the standby mode to relax the DIBL effect, resulting in the increase in threshold voltage and the reduction of subthreshold leakage current. It is found that a critical supply voltage, Vo, exists that determines the optimum DIBL value for the standby power suppression. When the supply voltage can be lowered less than Vo in the standby mode, a device with a larger DIBL value is preferable to a device with a smaller DIBL value in terms of the standby power reduction. It is also shown that the fluctuations of standby power due to the threshold voltage variation can be suppressed in this circuit scheme utilizing DIBL.