Optimum design of linear tuning algorithms

Abstract

A high-performance <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RC</tex> active filter realized as a thick or thin-film hybrid integrated circuit presents special fabrication problems. A filter of this type is so sensitive to its parameters that in a large proportion of cases, a circuit so constructed will not meet its performance specifications even if the tightest practicable tolerances are held on the circuit components. As a consequence, the filter network must be tuned after fabrication. It is not feasible to adjust circuit capacitors, hence all tuning must be accomplished by resistor adjustment, and these adjustments can only increase resistance. In this paper, a generalized tuning technique is described which makes the design of a tuning algorithm, and automated tuning, amenable to a universal computer mechanization. In addition to eliminating the analysis and software preparation required to set up a process-control system, the generalized algorithm improves the yield and speed of operation of the tuning process. The central idea of this tuning scheme is to estimate transfer function coefficient errors based on capacitor measurements and then to choose resistance values for the circuit in such a way as to minimize these errors. The operation of the algorithm is sequential, with succeeding resistance values chosen to minimize the cumulative error due to preceeding process steps.