Abstract
Based on the polyharmonic distortion (PHD) method, we present an approach to find the optimum conditions for efficient second-harmonic signal generation in millimeter-wave (mm-wave) harmonic oscillators that also maximize their DC-to-RF efficiency. These conditions include magnitude and phase of voltages at the gate and drain of the core transistors at both fundamental and second-harmonic signal components as well as the DC bias point to generate the maximum achievable second-harmonic power. We also establish that the steady-state oscillation at the fundamental frequency is a crucial criterion to obtain such conditions. The maximum achievable power and efficiency obtained from the proposed approach are independent of the harmonic oscillator topology and hence can be regarded as a reference for comparing different design techniques and structures. According to the proposed design procedure, the optimum conditions for an nMOS transistor acting as the active core of a 200-GHz harmonic oscillator are found and a second-order harmonic oscillator topology that can fulfill the optimum conditions is proposed. The oscillator is designed and fabricated in a 65-nm CMOS process and achieves peak DC-to-RF efficiency of 6.05%. The peak output power at 1.2-V supply is 2.9 dBm at 203 GHz.
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