Abstract
In this paper we simulate Digital Down Converter (DDC), as a chain of CIC and FIR filters, in order to optimize filter's coefficients. The goal is to achieve the widest possible bandwidth with four DDCs that will restrain fake peaks. DDC model is based on the DDC in Graychip's GC4016 Multi-Standard Quad DDC Chip. We use program MATLAB© to design and analyse four fixed-point DDC filter chains for a WB (Wide Band) application.
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