Optimizing cache energy efficiency in multicore power system simulations

Abstract

Due to recent trends in computer chip design and architecture, the power consumption of computing systems is increasing. Further, with increasing number of cores on a single chip, the size of cache is also increasing and hence, their contribution in overall processor power consumption has become significant. As computing systems become ubiquitous, their excessive power consumption is likely to increase the demands of electricity, thus increasing the level of stress on power systems. In this paper, we propose an approach for reducing cache energy consumption in power system dynamic simulations which are computationally intensive. Our approach is based on the observation that there exists large intra- and inter-program variation in cache resource demand in simulation of different contingencies. Thus, using decay cache technique, we dynamically turn off the cache blocks to save cache energy. In multicore systems, the requirements of meeting worst-case cache demand leads to over-provisioning of resources and hence, saving cache energy is even more important in multicore systems. Hence, we evaluate energy savings in the context of both dual-core and quad-core processors. We simulate several contingencies of different power systems using time domain simulation. Further, we explore the opportunity of dynamically saving cache energy by using a computer architecture simulator and simulate dual-core and quad-core processor configurations. The results show that our technique is effective in saving cache energy and also keeps the loss in performance minimal.