Optimizing an on-chip boost DC–DC converter with an on-chip or on-board inductor

Abstract

This study is dedicated to develop an on-chip DC---DC boost converter with on-chip or on-board inductors to provide steady high voltage biases from 2.8 to 5 V to drive the gate drivers for advanced liquid crystal displays. Note that the off-chip inductor as compared to the on-chip one inevitably occupies substantial board area and leads to negative effects of electro-magnetic interference (EMI). This study also intends to find optimal design of the on-chip or on-board inductors for an on-chip DC---DC converter in order to provide required large instantaneous currents, while minimizing negative impacts from the off-chip inductance. Parametric studies are conducted to successfully find optimal designs, including optimal switching frequency and duty. The optimization process is further standardized for future commercialization. The optimized DC---DC converters are taped out via the TSMC 0.35 μm CMOS process technology to validate the proposed design. Experiments are carried out for validating the performance of tape-out chips. The results clearly show the effectiveness of the designs and consistency to expectations.