Optimized switching techniques for Multilevel Inverter with Reduced number of switches

Abstract

Inverters are an integral part of most PE systems. The most commonly used inverter is a two level inverter which has some draw backs. Output voltage of two level inverter is quasi square wave and to connect with electrical grid, the output voltage of inverter must be near to sinusoidal wave (IEEE 1547). This can be achieved by using filters that are bulky in size and require more space. Also the voltage magnitude of inverter must be high enough to synchronize with the grid hence the required power electronic switch rating increases which increases cost and also introduces losses to the system. To overcome this problem Multi Level Inverters(MLI) such as Flying capacitor MLI, diode clamped MLI, and H-bridge MLI are used. Another upcoming topology is reduced switch MLI. To develop a MLI with a Voltage waveform with reduced Total Harmonic Distortion(THD), the number of voltage levels are to be increased and a suitable switching technique is also required. In this paper an improved and optimized Time based switching technique and Near level modulation technique is proposed for 29 level single phase inverter. The THD in the output voltage by applying these techniques is compared and presented.