Abstract

A detailed procedure is presented for fabrication of free-standing silicon photonic devices that accurately reproduces design dimensions while minimizing surface roughness. By reducing charging effects during inductively coupled-plasma reactive ion etching, undercutting in small, high-aspect ratio openings is reduced. Slot structures with a width as small as 40 nm and an aspect ratio of 5.5:1 can be produced with a nearly straight, vertical sidewall profile. Subsequent removal of an underlying sacrificial silicon dioxide layer by wet-etching to create free-standing devices is performed under conditions which suppress attack of the silicon. Slotted one-dimensional photonic crystal cavities are used as sensitive test structures to demonstrate that performance specifications can be reached without iteratively adapting design dimensions; optical resonance frequencies are within 1% of the simulated values and quality factors on the order of 105 are routinely attained.

Highlights

  • Process technology for the fabrication of silicon photonic devices is already well established, the development of which has leveraged the extensive previous knowledge in the field of microelectronics.1 the dimensional and geometric specifications of the most aggressively miniaturized photonic devices, such as microresonators,2 photonic crystals,3 and optoelectromechanical devices,4,5 still present challenges

  • Slotted one-dimensional photonic crystal cavities are used as sensitive test structures to demonstrate that performance specifications can be reached without iteratively adapting design dimensions; optical resonance frequencies are within 1% of the simulated values and quality factors on the order of 105 are routinely attained

  • This paper describes a particular method for fabrication of free-standing silicon photonic devices that faithfully reproduces design dimensions while achieving the necessary surface roughness and cross-sectional geometry of the desired structures

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Summary

INTRODUCTION

Process technology for the fabrication of silicon photonic devices is already well established, the development of which has leveraged the extensive previous knowledge in the field of microelectronics. the dimensional and geometric specifications of the most aggressively miniaturized photonic devices, such as microresonators, photonic crystals, and optoelectromechanical devices, still present challenges. For devices where part or all of the structure has dimensions well below 100 nm, competing requirements on process conditions and behavior, such as the formation of passivation layers, often arise. This can result in unacceptable profiles including, for example, markedly sloped sidewalls or undercutting.. This paper describes a particular method for fabrication of free-standing silicon photonic devices that faithfully reproduces design dimensions while achieving the necessary surface roughness and cross-sectional geometry of the desired structures. An approach is presented to avoid a bowed or undercut profile during inductively coupled-plasma reactive ion etching (ICP-RIE) with HBr/O2 chemistry of small, highaspect ratio openings, which at the same time maintains nearly vertical sidewalls. The benefits are demonstrated with an example of the performance of a slotted one-dimensional (1D) photonic crystal nanobeam cavity, a design which is especially sensitive to dimensional accuracy.

MODELING
EXPERIMENTAL RESULTS
Dry etching of silicon
Device release
SUMMARY AND CONCLUSIONS
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