Optimized fabrication of wafer-level Si waveguides based on 200 mm CMOS platform

Abstract

The scattering loss, which causes by the sidewall roughness, is a major contributor to the propagation loss of Si waveguides. A simple structural model based on finite-difference time-domain method was used to analyze the scattering loss of single-mode Si strip waveguides. The Si strip waveguides were fabricated on SOI wafer by 200 mm CMOS platform, and the effect of hydrogen annealing and the mask level on the scattering loss for Si waveguides were also investigated. The changes of the resultant scattering loss were well correlated with the measured root-mean-square roughness of the waveguide sidewalls obtained by SEM image analysis. With annealing temperature increased, the sidewall roughness of waveguides was remarkably improved, so the propagation loss of waveguides decreased obviously. Meanwhile, using a high quality mask can further reduce the propagation loss of Si waveguides. Optimized process parameters were implemented to obtain low-loss waveguides with 2.0 dB/cm, which also showed a good uniformity along the SOI wafer.