Abstract
The design of low consumption CMOS circuits, nanotechnologies and quantum computing has becomed more attached to the reversible logic. A set of gates have been recently exploited in reversible computer science for the design of certain circuits. Among them, we find the decoders. In this paper we have exploited a recent study making the design of the decoder 2 to 4, 3 to 8, and n to 2n, our work aims to enhance the previous designs , by replacing some reversible gates by others while maintaining their functionality and improving their performance criteria namely the number of gates (CG), number of garbage outputs (NGO), number of constant inputs(NCI), Quantum cost (QC) and hardware complexity (HC), compared to our study of the base and other recent studies from which we have obtained remarkable results.
Highlights
The energy consumed in the circuits presents a major problem revealed in many research studies that are in progress to design low power devices
A quantum computer is quantum network composed of quantum logic gates; It has applications in many research areas such as Low Power Complementary Metal Oxide Semiconductor (CMOS) design, quantum computing, etc
2) Number of Garbage Outputs (NGO): The unused or unwanted logic outputs of the reversible gate maintain in the output lines to make the circuit reversible [3]
Summary
The energy consumed in the circuits presents a major problem revealed in many research studies that are in progress to design low power devices. In irreversible circuits from the output vector, one cannot uniquely deduce the associated input vector which results in a loss of information which in turn generates a heat dissipation of KTln2Joules by bit loss, where K is the Boltzmann constant and T is the absolute temperature. There is no loss of information in the reversible circuits, and a minimum amount of power dissipation. All quantum gates are reversible gates and quantum computing is one of the ways to design low power circuits. There is a one-to-one mapping of inputoutput model in all quantum gates Reversible circuits are those circuits whose outputs can be decided from the input template. This paper will be organized as follows: the 2nd section presents the reversible gates and their performance criteria, namely the quantum cost deduced from the associated quantum implementation, and the hardware complexity. In the 4th section, we will present our design of the decoder 2 to 4, 3 to 8 and n to 2n and display 5 performance criteria while calculating the percentages of improvement obtained. in the 5th section a conclusion and perspectives
Sign-in/Register to view highlights & summary Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: International Journal of Advanced Computer Science and Applications
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
