Optimized approach for minimisation of THD in L-L voltage of three-phase cascaded multi-level inverters

Abstract

Cascaded multi-level inverters are gaining much attention by researchers in recent times due to its easy implementation and control. A better approach to reduce total harmonic distortion (THD) in all the three L-L voltages of three-phase multi-level inverters is presented in this paper. It is a fundamental frequency switching strategy where the switching angles can be so selected such that THD in output L-L voltages is minimized to a great extent. In order to obtain most favorable switching angles, an optimisation algorithm using GA is applied to L-L output voltages of three phase multi-level inverters. From three-phase load view point, THD in L-L output voltage of three phase multi-level inverters is a major apprehension when compared to phase voltage. Keeping this in view, optimisation algorithm using GA is applied to L-L voltages (RY, YB, BR) of all the three phases of cascaded multi-level inverters for minimisation of THD. The number of levels in the output will be dynamic and is based on the switching angles chosen and accordingly variations in THD levels too. To support simulation results, hardware for producing triggering pulses of the switches are realized, with the switching times determined by the genetic algorithm and generated using STM32F04 DSP passing through a driver (IR2110) cabinet.