Abstract
Floorplanning is a prominent area in the Very Large-Scale Integrated (VLSI) circuit design automation, because it influences the performance, size, yield and reliability of the VLSI chips. It is the process of estimating the positions and shapes of the modules. A high packing density, small feature size and high clock frequency make the Integrated Circuit (IC) to dissipate large amount of heat. So, in this paper, a methodology is presented to distribute the temperature of the module on the layout while simultaneously optimizing the total area and wirelength by using a hybrid Particle Swarm Optimization-Harmony Search (HPSOHS) algorithm. This hybrid algorithm employs diversification technique (PSO) to obtain global optima and intensification strategy (HS) to achieve the best solution at the local level and Modified Corner List algorithm (MCL) for floorplan representation. A thermal modelling tool called hotspot tool is integrated with the proposed algorithm to obtain the temperature at the block level. The proposed algorithm is illustrated using Microelectronics Centre of North Carolina (MCNC) benchmark circuits. The results obtained are compared with the solutions derived from other stochastic algorithms and the proposed algorithm provides better solution.
Highlights
Very Large-Scale Integrated (VLSI) physical design automation process plays an important role in fabrication of Integrated Circuit (IC)
In hybrid PSO-HS algorithm, each particle and harmonies corresponds to a potential solution
Different performance measures are considered like area, wirelength and dead space obtained on the Microelectronics Centre of North Carolina (MCNC) benchmarks are compared with standard stochastic and heuristics algorithms reported in the literature
Summary
VLSI physical design automation process plays an important role in fabrication of ICs. Memetic Algorithm (MA) [18] for a non-slicing VLSI floorplanning problem is proposed It uses an effective genetic search method to explore the search space and an efficient local search method to exploit information in the search region. A fast thermal modelling tool [22] is developed to handle VLSI floorplanning at block level Hybridizing these two algorithms that are individually good at exploration (PSO) [23] and exploitation (HS) respectively will lead to a balanced algorithm. A new methodology which integrates: MCL algorithm for floorplan representation (with search space O((n!) and computational complexity O(n)), PSO and HS algorithm (for their best global and local search mechanism) for soft modules, hotspot tool (for thermal modelling) is proposed in this paper.
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