Abstract
The objective is to optimize the configuration sizes and thermal performance of a multilayer silicon microchannel heat sink by the thermal resistance network model. The effect of structural parameter on the thermal resistance is analyzed by numercal simulation. Taking the thermal resistance as an objective function, a nonlinear and multi-constrained optimization model are proposed for the silicon microchannel heat sink in electronic chips cooling. The sequential quadratic programming (SQP) method is used to do the optimization design of the configuration sizes of the microchannel. For the heat sink with the size of 20mm?20mm and the power of 400 W, the optimized microchannel number, layer, height and width are 40 and 2, 2.2mm and 0.2mm, respectively, and its corresponding total thermal resistance for whole microchannel heat sink is 0.0424 K/W.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
