Optimization of the reflow soldering process with multiple quality characteristics in ball grid array packaging by using the grey‐based Taguchi method

Abstract

PurposeReflow soldering is one of the most significant factors in determining solder joint defect rate. This study aims to introduce an innovative approach for optimizing the multiple performances of the reflow soldering process.Design/methodology/approachThis study aims to minimize the solder joint defect rate of a ball grid array (BGA) package by using the grey‐based Taguchi method. The entropy measurement method was employed together with the grey‐based Taguchi method to compute for the weights of each quality characteristic. The Taguchi L18 orthogonal array was performed, and the optimal parameter settings were determined. Various factors, such as slope, temperature, and reflow profile time, as well as two extreme noise factors, were considered. The thermal stress, peak temperature, reflow time, board‐ and package‐level temperature uniformity were selected as the quality characteristics. These quality characteristics were determined using the numerical method. The numerical method comprises the internal computational flow that models the reflow oven coupled with the structural heating and cooling models of the BGA assembly. The Multi‐physics Code Coupling Interface was used as the coupling software.FindingsThe analysis of variance results reveals that the cooling slope was the most influential factor among the multiple quality characteristics, followed by the soaking temperature and the peak temperature. Experimental confirmation test results show that the performance characteristics improved significantly during the reflow soldering process.Practical implicationsThe proposed approach greatly reduces solder joint defects and enhances solutions to lead‐free reliability issues in the electronics manufacturing industry.Originality/valueThe findings provide new guidelines to the optimization method which are very useful for the accurate control of the solder joint defect rate within components and printed circuit board (PCB) which is one of the major requirements to achieve high reliability of electronic assemblies.