Optimization of the area efficiency and robustness of a QCA-based reversible full adder

Abstract

Recently, quantum dot cellular automata (QCAs) have evolved as the most promising candidate to overcome the fundamental nanoscale limitations of present complementary metal–oxide–semiconductor (CMOS) technology. Owing to their quasiadiabatic switching, QCAs have huge potential for the design of THz-frequency logic circuits and ultralow-power digital circuits with extremely high device density. The aim of the work presented herein is to maximize the benefits of a QCA-based circuit design by deploying reversible computing logic. A highly efficient reversible QCA-based full adder is proposed by using a three-input and five-input majority gate architecture. The proposed design demonstrates significant improvements in circuit complexity, area efficiency, and quantum cost while retaining performance in terms of latency and area usage. Coplanar crossovers are properly realized using 180° clock zones. The performance of the proposed design surpasses that of recent literature designs, with a 25% reduction in the circuit complexity, a 28% saving in the total area, a 24.57% decrease in the cell area, and an approximately 1/4 reduction in the quantum cost. To verify the feasibility of the proposed design, its thermal robustness is analyzed and hazard analysis is also performed. The proposed full adder is further employed to realize reversible ripple-carry adders (RCAs) of variable size. The proposed RCAs also show significant improvements in terms of the mentioned performance parameters.