Abstract

Owing to the limitations of scaling down, the development of complex structures for chip design is progressing in the semiconductor industry. As a result, the chemical mechanical polishing (CMP) process has become essential for the precise control of micro-level steps and for maintaining surface uniformity between layers during the stacking process. Structural management and improved performance of the consumables used in CMP processes are required. In particular, controlling the abrasive particles in the slurry that directly contact the wafer surface is crucial. Large particles within the slurry can occur scratches and cause non-uniformity in the polishing process, thus the particle size distribution of the slurry must be regulated. In this study, two types of filtration systems were constructed to determine the optimal conditions for CMP of ceria slurry. Depth filtration effectively removes particles through a cake layer formation mechanism but has limitations in achieving a consistent pore size within the fiber layer. Consequently, separation efficiency for particle sizes is relatively low. In contrast, surface filtration consisting of a single membrane demonstrates a consistent correlation between pore size and the size of the filtered particles, resulting in high particle removal efficiency. The pore size capable of removing large particles without active particle loss was 200 nm. After evaluating slurry productivity and filter-induced agglomeration, 0.8 L per minute (LPM) was identified as the optimal flow rate. Additionally, after filtration at 0.8 LPM, the maximum reduction in removal rates was relatively small at 272.54 Å/min due to decreased edge removal rates. However, by removing large particles to implement a monodisperse state, an improvement in uniformity of 17.11 % was achieved. Therefore, the CMP performance can be enhanced using surface filtration to control the particle size distribution (PSD).

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