Optimization of nitrided gate dielectrics by plasma-assisted and rapid thermal processing

Abstract

This article addresses several aspects of nitrogen atom (N atom) incorporation into ultrathin gate oxides including: (i) monolayer incorporation of N atoms at the Si–SiO2 interfaces to reduce tunneling currents and improve device reliability; and (ii) the incorporation of silicon nitride films into stacked oxide–nitride (ON) gate dielectrics to (a) increase the capacitance in ultrathin dielectrics without decreasing film thickness, and (b) suppress boron atom (B atom) diffusion from p+ polycrystalline Si gate electrodes through the dielectric layer to the Si substrate channel region. The results of this article demonstrate that these N-atom spatial distributions can be accomplished by low thermal budget, single wafer processing which includes (i) low-temperature (300 °C) plasma assisted oxidation, nitridation, and/or deposition to achieve the desired N-atom incorporation, followed by (ii) low thermal budget (30 s at 900 °C) rapid thermal annealing to promote chemical and structural bulk and interface relaxation.