Optimization of Metallization Processes for 28-nm-Node Low-k /Cu Multilevel Interconnects

Abstract

As design rules shrink, integrated circuits speed becomes more impacted by low k (LK) dielectric / Cu back end of line (BEOL) interconnects. At 28 nm node, the copper line aspect ratio (AR) is usually equal to or greater than 2.5, and the line trench gap-fill AR is even bigger (> = 3.5). This makes the BEOL copper metallization very challenge, but a Cu void-free dual damascene gap-fill performance must be delivered. In this study, 28nm interconnect development experiments were carried out, and a comprehensive analysis of gap-fill improvement was conducted, based on titanium nitride (TiN) metal hard mask (MHM) integration scheme. This MHM scheme may have increased the aspect ratio of copper line due to the existence of the remaining TiN layer and its beneath sacrificial films. Furthermore, in the conventional physical vapor deposition (PVD) barrier / seed process, the overhang of barrier / seed at top corner will be enlarged significantly due to the nature of physical vapor deposition (PVD) re-sputtering. When hydrogen peroxide (H2O2) clean was used to recess TiN layer, the protruded underneath dielectric layer is modified to form a triangle shaped trench entrance. The deformed trench entrance would increase Cu seed deposition rate at the top corner and further enhance the overhang feature. This paper shall report the latest success of the 28nm Cu / low-k BEOL development.