Optimization of low-k dielectric (fluorinated SiO/sub 2/) process and evaluation of yield impact by using BEOL test structures

Sunnys Hsieh Sunnys Hsieh,C.C.-H Hsu,Sheng-Che Lin Sheng-Che Lin,Sing-Mo Tseng Sing-Mo Tseng,K.Y.-Y Doong,Yen-Hsuan Ho Yen-Hsuan Ho,Binson Shen Binson Shen,Yeu-Haw Yang Yeu-Haw Yang

doi:10.1109/icmts.2000.844432

Optimization of low-k dielectric (fluorinated SiO/sub 2/) process and evaluation of yield impact by using BEOL test structures

Sunnys Hsieh Sunnys Hsieh, C.C.-H Hsu + Show 6 more

https://doi.org/10.1109/icmts.2000.844432

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Publication Date: Mar 13, 2000

Citations: 2

Affiliation: Tsinghua University

#Back End Of Line #Test Structures + Show 8 more

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Abstract

This work describes the optimization of low-k dielectric process and evaluation of yield impact by using back end of line (BEOL) test structures. Three splits of the low-k dielectric process were compared with high-density-plasma un-doped-silicon-glass (HDP-USG) process and are electrically characterized with the test structures of the BEOL unit process and integration process parameter extraction. The interconnect capacitance is used as the optimization criteria of low-k dielectric process and the yield impact is reviewed for the concern of manufacturing.

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